Regviz

Freescale Semiconductor /MK61F15WS /DDR /CR43

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR43

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MK61F15WS/DDR/CR43#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0P2RDCNT0RESERVED0 (00)RP20RESERVED0 (00)WP20RESERVED

RP2=00, WP2=00

Description

DDR Control Register 43

Fields

P2RDCNT

Port 2 Read command Count
RESERVED

Reserved
RP2

Read command priority Port 2

0 (00): Highest

1 (01): -----

2 (10): -----

3 (11): Lowest
RESERVED

Reserved
WP2

Write command priority Port 2

0 (00): Highest

1 (01): -----

2 (10): -----

3 (11): Lowest
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data